1. Field of the Invention
This invention relates to a semiconductor memory device and a method for controlling the same. More particularly, it relates to a Last In - First Out device or LIFO device in which last written data is read out first, and the method for controlling the same.
2. Description of the Background Art
A LIFO device is used for example in a duplicator for duplicating on the reverse side of the paper in case double-side duplication and for making duplication in such a manner that the left and right sides of the original is reversed. FIG. 7 is a block diagram showing the structure of the conventional LIFO device disclosed in the Japanese Utility Model Laying-Open No. 62-175499.
This LIFO device includes a first memory 11, a second memory 12, a write address counter 13, a read-out address counter 14 and multiplexers 15, 16. The outputs of the write address counter 13 and the read-out address counter 14 are multiplexed by the multiplexers 15, 16 so as to be applied to the memories 11, 12 as the write address or the read out address. When the write address is applied to the memory 11, the read-out address is applied to the memory 12 and, when the read-out address is applied to the memory 11, the write address is applied to the memory 12.
The write address counter 13 is set by a write reset signal WRST to a specified address, such as address 0. A count up operation is then performed in synchronism with a write clock signal WCK. The read-out address counter 14 is set by a read-out reset signal RRST to a specified address, such as an address n-1, and a count-down operation is then performed in synchronism with a read-out clock signal RCK.
FIG. 8 shows the write address movement and the read-out address movement in the LIFO device of FIG. 7.
In a phase 1, the memory 11 performs a writing operation, while the memory 12 performs a read-out operation. The write address counter 13 performs a count-up operation so that the write address is incremented sequentially from address 0 to address n-1. On the other hand, the read-out address counter 14 performs a count-down operation, so that the read-out address is sequentially decremented from address n-1 to address 0. The data read out in phase 1 from the memory 12 are the data written before phase 1.
In phase 2, the memory 11 performs a read-out operation, while the memory 12 performs the write operation. In this case, the write address counter 13 similarly performs a count-up operation so that the write address is sequentially incremented from address 0 to address n-1. The read-out address counter 14 performs a count-down operation so that the read-out address is sequentially decremented from address n-1 to address 0. The data read out in phase 2 from the memory 11 are the data written in phase 1 and are read out in the reverse order to that used in writing.
In phase 3, the memory 11 performs a write operation, while the memory 12 performs a read-out operation. In this case, the write address counter 13 performs a count-up operation, while the read-out address counter 14 performs a count-down operation. The data read out from the memory 12 in phase 3 are the data written in phase 2, and are read out in the reverse order to that used in writing.
Similar operation is repeated following phase 3 to realize a LIFO operation capable of performing continuous data read-out and writing.
In the above described conventional LIFO Device, not only the two memories 11, 12 but a logic IC having the functions of the multiplexers 15, 16 and address counter 13, 14 are required, resulting in an increased number of component parts and an inconveniently large substrate area.
On the other hand, there is disclosed in the Japanese Patent Laying-Open Nos. 60-262242 and 63-153787 are First In - First Out circuit or FIFO circuit provided with a memory circuit, a write pointer and a read-out pointer. In this FIFO circuit, control is so made that writing always precedes read-out to realize the First In - First Out operation. Hence, it may be contemplated to implement the LIFO operation with the use of this FIFO circuit. However, when the control is so made in this FIFO circuit that simply the read-out always precedes writing, it is not possible to implement the LIFO operation capable of continuous read-out and writing.